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Example description

  
DMA_FLASH_RAM DMA_FLASH_RAM
  
Example Description 

This example provides a description of how to use a DMA channel to transfer 
a word data buffer from FLASH memory to embedded SRAM memory.

DMA2 Stream0 channel0 is configured to transfer the contents of a 32-word data 
buffer stored in Flash memory to the reception buffer declared in RAM.

The start of transfer is triggered by software. DMA2 Stream0 channel0 memory-to-memory
transfer is enabled. Source and destination addresses incrementing is also enabled.
The transfer is started by setting the Channel enable bit for DMA2 Stream0 channel0.
At the end of the transfer a Transfer Complete interrupt is generated since it
is enabled. The Transfer Complete Interrupt pending bit is then cleared. 
When the DMA transfer is completed the DMA Stream is disabled by hardware.
The main application can check on the Stream Enable status to detect the end of
transfer or can also check on the number of remaining transfers which should be 
equal to 0 at the end of the transfer. 
A comparison between the source and destination buffers is done to check that all 
data have been correctly transferred.

STM32 Eval board's LEDs can be used to monitor the transfer status:
 - LED1 is ON when the program starts.
 - LED2 is ON when the configuration phase is done and the transfer is started.
 - LED3 is ON when the transfer is complete (into the Transfer Complete interrupt
   routine)
 - LED4 is ON when the comparison result between source buffer and destination 
   buffer is passed.

It is possible to select a different Stream and/or channel for the DMA transfer
example by modifying defines values in the file main.h.
Note that only DMA2 Streams are able to perform Memory-to-Memory transfers.

There are different options to check on the DMA end of transfer:
 1. Use DMA Transfer Complete interrupt.
 2. Use DMA enable state (the DMA stream is disabled by hardware when transfer 
    is complete).
 3. Use DMA Stream transfer counter value (the counter value is decremented when
    transfer is ongoing and is equal to 0 at the transfer end).
 4. Use DMA Transfer Complete flag (polling mode).

In this example methods 1, 2 and 3 are provided (you can select between method 2 
and 3 by uncommenting relative code in waiting loop in the main.c file).


Directory contents 

  - DMA/FLASH_RAM/system_stm32f2xx.c   STM32F2xx system clock configuration file
  - DMA/FLASH_RAM/stm32f2xx_conf.h     Library Configuration file
  - DMA/FLASH_RAM/stm32f2xx_it.c       Interrupt handlers
  - DMA/FLASH_RAM/stm32f2xx_it.h       Interrupt handlers header file
  - DMA/FLASH_RAM/main.c               Main program
  - DMA/FLASH_RAM/main.h               Main program header file

	  The "system_stm32f2xx.c" is generated by an automatic clock configuration 
      tool and can be easily customized to your own configuration. 
      To select different clock setup, use the "STM32F2xx_Clock_Configuration_V1.0.0.xls" tool. 

      
Hardware and Software environment 

  - This example runs on STM32F2xx Devices.
  
  - This example has been tested with STM322xG-EVAL RevB and can be easily tailored
    to any other development board.