• Important information
• New features
• Known problems
• Program corrections
• User guide corrections
• Miscellaneous
• Release history

Important information

• The compiler now avoids the LDRD instruction with the base register in list when generating code for Cortex-M3. This is to work around the Cortex-M3 erratum 602117.

• News in EWARM 6.10.2:
  

  The --guard_calls command line option is introduced. Note, --guard_calls must always be used in applications written in EC++/C++ that need thread-safe library function calls. For more information see the Development guide.

  The --no_guard_calls command line option is removed.

  The --aeabi command line option has modified behavior: Guard calls are not used by default.
  Migration instructions from IAR C/C++ Compiler for ARM 5.x and 6.10.1 to IAR C/C++ Compiler for ARM 6.10.2:
  --aeabi (without --no_guard_calls) shall be replaced with --aeabi --guard_calls
--aeabi --no_guard_calls shall be replaced with --aeabi
  

• News in EWARM 6.20:
  

  A customer that have implemented the time() function must now rename it into __time32(). For more information see the Development guide.

• A special note on CMSIS integration:
  

  If your application source code include CMSIS header files explicitly, then you should not check the Use CMSIS check-box Project>Options...>General Options>Library Configuration>Use CMSIS. Some of the Cortex-M application examples includes CMSIS source files explicitly, do not check the said check-box in these projects.
  
  However, due to the evolution of the IAR C/C++ Compiler for ARM, older versions of CMSIS are incompatible with the current version of the compiler. One simple example of how to solve this issue is:
  a) Press F4 to bring up the erroneous source (header) file in the editor - in most cases named core_cm3.h.
  b) Right-click on the window tab of that editor window, choose File Properties....
  c) Add (or remove) any character to the file name - so the compiler won't find it any more.
  d) Modify project options: Check Project>Options...>General Options>Library Configuration>Use CMSIS.
  Steps a) to c) might need to be done for more than one file. Normally, the names of these files are core_cm0.h, core_cm3.h, core_cm4.h, core_cmFunc.h and core_cmInstr.h.
  
  For more information about CMSIS integration in the IAR Embedded Workbench for ARM, see the Development guide.

• The runtime library assumes that unaligned access is allowed when it is available in the architecture
  

  For ARM core architectures where unaligned access is permitted and offers the possibility to generate more efficient code, the runtime library is built to take advantage of this. For example the library for Cortex-M3 assumes that the UNALIGN_TRP bit is not set by the embedded application.

New features

• None.

Known Problems

• The C/C++ library header file time.h declares the library function mktime. When called with a negative value in the broken-down time component tm_isdst, which is part of the tm struct function parameter, mktime fails to determine whether Daylight Saving Time is active for the specified time or not.
  [EW14632]

• The rather naive algorithm for checking whether a symbol is used or not might lead to unexpected warning messages from the compiler.
  [EW23132]

• When generating code for Thumb1, any stack accesses that either explicitly or through compiler optimizations get a negative offset from SP will result in an internal error.
  [EW24231]

• Loops containing two or more expressions where the loop variable +/- a constant offset is multiplied with a loop invariant expression, might be optimized incorrecly if the constant offset differs between the expressions.
  [EW24238]

• When generating code for VFP in Thumb2, if the program contains a code sequece that selects the smallest of two floating point values the compiler may issue an internal error.
  [EW24246]

• Putting a partial update of a local short variable at the end of a loop body or a conditional block can sometimes make the compiler crash.
  [EW24247]

Program Corrections

• On medium and high optimizations, a pointer variable p can be optimized incorrectly if p is assigned the address of an array element, where the index expression is an other array expression or an indirect load, and the value of the index expression changes between the assignment of p and the use(s) of p.
  [EW24173]

User guide corrections

• Clarifications concerning heap usage and multithread support in the Development guide:
  
  On page 394, replace this text:
  Functions that use files or the heap in some way. This includes printf, sprintf, scanf, sscanf, getchar, and putchar.
  With this text:
  Functions that use files or the heap in some way. This includes scanf, sscanf, getchar, and putchar. In addition, if you are using the options --enable_multibyte and --dlib_config=Full, the printf and sprintf functions (or any variants) can also use the heap.
  
  On page 129, add this text after the table:
  If you are using printf/scanf (or any variants) with formatters, each individual formatter will be guarded, but the complete printf/scanf invocation will not be guarded.
  
  
• The description of two new #pragma directives are missing in the Development guide:
  
  default_function_attributes
  
  
  Syntax
  #pragma default_function_attributes=[ attribute...]
  
  where attribute can be:
  type_attribute
object_attribute
@ segment_name
  
  
  Parameters
  type_attribute For information, see Type attributes, page 317.
  object_attribute For information, see Object attributes, page 319.
  @ segment_name For information, see Controlling data and function placement in memory, page 203.
  
  
  Description
  Use this pragma directive to set default segment placement and type and object attributes for function declarations and definitions. The default settings are only used for declarations and definitions that do not specify type or object attributes or location in some other way.
  Specifying a default_function_attributes pragma directive with no attributes, restores the initial state where no such defaults have been applied to function declarations and definitions.
  
  Example

  /* Place following functions in section MMYSEC */
  #pragma default_function_attributes = @ "MYSEC"
  int fun1(int x) { return x + 1; }
  int fun2(int x) { return x - 1; }
  /* Stop placing functions into MYSEC */
  #pragma default_function_attributes =
  
  has the same effect as:
  
  int fun1(int x) @ "MYSEC" { return x + 1; }
  int fun2(int x) @ "MYSEC" { return x - 1; }

  
  default_variable_attributes
  
  
  Syntax
  #pragma default_variable_attributes=[ attribute...]
  
  where attribute can be:
  type_attribute
object_attribute
@ segment_name
  
  
  Parameters
  type_attribute For information, see Type attributes, page 317.
  object_attribute For information, see Object attributes, page 319.
  @ segment_name For information, see Controlling data and function placement in memory, page 203.
  
  
  Description
  Use this pragma directive to set default segment placement and type and object attributes for declarations and definitions of variables with static storage duration. The default settings are only used for declarations and definitions that do not specify type or object attributes or location in some other way.
  Specifying a default_variable_attributes pragma with no attributes restores the initial state of no such defaults being applied to variables with static storage duration.
  
  Example

  /* Place following variables in section MYSEC */
  #pragma default_variable_attributes = @ "MYSEC"
  int var1 = 42;
  int var2 = 17;
  /* Stop placing variables into MYSEC */
  #pragma default_variable_attributes =
  
  has the same effect as:
  
  int var1 @ "MYSEC" = 42;
  int var2 @ "MYSEC" = 17;

Miscellaneous

• Generate workarounds for hardware problems:

  • Functional problem Core.1 in NXP device LPC2478: Incorrect update of the Abort Link register in Thumb state.
    Workaround generated with iccarm --enable_hardware_workaround=NXP_Core.1

  • Functional problem 463764 in Cortex-M3 devices: Core may freeze for SLEEPONEXIT single instruction ISR. More information is available on infocenter.arm.com.
    Workaround generated for functions with attribute __irq with iccarm --enable_hardware_workaround=arm463764

  • Functional problem in Stellaris devices: Non-word-aligned write to SRAM can cause incorrect value to be loaded. More information is available on the Stellaris web site at www.ti.com/stellaris.
    Workaround generated with iccarm --enable_hardware_workaround=LM3S_NWA_SRAM_Write

  • Functional problem in Freescale Semiconductors MC9328MX1 (i.MX1), masks 0L44N, 1L44N, and 2L44N:
    The LDM instruction will in some cases not load the second register correctly. Workaround generated with iccarm --enable_hardware_workaround=920t-ldm2
    NOTE: The libraries in the current EWARM version are not built with this workaround. Use EWARM 6.50.6 and linker option --enable_hardware_workaround=920t-ldm2 to use libraries built with this hardware workaround.

Release history

See release history.